Download PDF by : 1364.1-2002 IEEE Standard for Verilog Register Transfer

ISBN-10: 0738135011

ISBN-13: 9780738135014

Ordinary syntax and semantics for VerilogR HDL-based RTL synthesis are defined during this regular.

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15 Event or Supported. 1 Vector bit-select and part-select addressing Supported. 2 Array and memory addressing Supported. 3 Strings Supported. 3 Minimum, typical, and maximum delay expressions constant_expression ::= constant_primary | unary_operator { attribute_instance } constant_primary | constant_expression binary_operator { attribute_instance } constant_expression | constant_expression ? { attribute_instance } constant_expression : constant_expression | string constant_mintypmax_expression ::= constant_expression | constant_expression : constant_expression : constant_expression expression ::= primary | unary_operator { attribute_instance } primary | expression binary_operator { attribute_instance } expression | conditional_expression | string mintypmax_expression ::= expression | expression : expression : expression constant_primary ::= constant_concatenation | constant_function_call | ( constant_mintypmax_expression ) | constant_multiple_concatenation 40 Copyright © 2002 IEEE.

3 Procedural continuous assignments net_assignment ::= net_lvalue = expression procedural_continuous_assignments ::= assign variable_assignment ; | deassign variable_lvalue ; | force variable_assignment ; | force net_assignment ; | release variable_lvalue ; | release net_lvalue ; variable_assignment := variable_lvalue = expression net_lvalue ::= hierarchical_net_identifier | hierarchical_net_identifier [ constant_expression ] { [ constant_expression ] } | hierarchical_net_identifier [ constant_expression ] { [ constant_expression ] } [ constant_range_expression ] | hierarchical_net_identifier [ constant_range_expression ] | net_concatenation Copyright © 2002 IEEE.

Copyright © 2002 IEEE. All rights reserved. 2 Task enabling and argument passing task_enable ::= hierarchical_task_identifier [ ( expression { , expression } ) ] ; Recursion with a static bound shall be supported. 3 Task memory usage and concurrent activation Supported. 1 Function declarations function_declaration ::= function [ automatic ] [ signed ] [range_or_type] function_identifier ; function_item_declaration { function_item_declaration } function_statement endfunction | function [ automatic ] [ signed ] [ range_or_type ] function_identifier ( function_port_list ) ; block_item_declaration { block_item_declaration } function_statement endfunction function_item_declaration ::= block_item_declaration | tf_input_declaration ; function_port_list ::= { attribute_instance } tf_input_declaration { , { attribute_instance } tf_input_declaration } tf_input_declaration ::= input [ reg ] [ signed ] [ range ] list_of_port_identifiers | input [ task_port_type ] list_of_port_identifiers range_or_type ::= range | integer | real | realtime | time block_item_declaration ::= { attribute_instance } block_reg_declaration | { attribute_instance } event_declaration | { attribute_instance } integer_declaration | { attribute_instance } local_parameter_declaration | { attribute_instance } parameter_declaration ; | { attribute_instance } real_declaration | { attribute_instance } realtime_declaration | { attribute_instance } time_declaration block_reg_declaration ::= reg [ signed ] [ range ] list_of_block_variable_identifiers ; list_of_block_variable_identifiers ::= block_variable_type { , block_variable_type } 54 Copyright © 2002 IEEE.

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